1. Field of Invention
This invention relates to new methods of controlling the shape of the mold used for manufacturing high-current emitting field-emitter array structures.
One prior art method is described in U.S. Pat. No. 4,307,507 issued Dec. 29, 1981 to Gray et al. This patent describes a method of manufacturing field-emitter array structures by using pyramidal-shaped mold holes, formed by lithography and crystal-orientation dependent etching on a single-crystal semiconductor wafer, with an optional passivation layer, such as a thermal SiO2 layer, a Si3N4 layer, or a metal layer, typically 30 Angstrom thick. The field-emitter array structures are formed by the deposition of the electron emitter material onto the mold wafer and the subsequent removal of the mold wafer. In this way, pyramidal-shaped electron emitter arrays with sharp emitter apex are obtained. However, in this method, the sharpness of the emitter apex fabricated by a mold without a passivation layer, or by a mold with an insufficiently thick passivation layer, is often degraded during the wafer removing process. When a sufficiently thick thermal SiO2 layer is used on a Si wafer as described by a prior art in U.S. Pat. No. 5,580,827 issued Dec. 3, 1996 to Akamine, the fast oxidation rate of the side facets of the pyramidal-shaped mold compared to the slow oxidation rate of recessed areas due to the stress dependent reduction of the oxygen diffusion rate (H. Umimoto, S. Odanaka, and I. Nakao, Numerical Simulation of Stress-Dependent Oxide Growth at Convex and Concave Corners of Trench Structures, IEEE Electron Device Letters, Vol. 10, No. 7, July 1989, pp. 330) results in several undesirable consequences such as;                1) The field-emitter apex becomes extremely sharp and the resultant narrow electron emitting area at the emitter apex cannot sustain the high currents required from the individual emitters for certain applications.        2) The side ridges of the pyramidal shaped field-emitters become extremely sharp, which leads to parasitic electron emission. The electron emission from the side ridges is undesirable in particular for the field-emission performance of arrays with additional gate electrodes fabricated e.g. following the prior art method described by Sokolich et al. (M. Sokolich, E. A. Adler, R. T. Longo, D. M. Goebel, R. T. Benton, Field emission from submicron emitter arrays, International Electron Device Meeting, 1990. IEDM '90. Technical Digest, IEDM90-159). For example, field-emitted electrons from the side ridges are likely to bombard the gate electrodes, which results in the premature failure of the device at low current level.        3) The electron beam emitted from thus formed sharp side ridges degrades the emittance of the beam directly due to its low symmetry and indirectly due to the space-charge effect.        4) Thus formed sharp side ridges of the pyramidal shaped field-emitter affect the topography of the insulating layers and the metallic layers to be deposited on top of the field-emitter array to manufacture gate electrodes, resulting in deformation of the shape of the gate aperture holes and undesirable degradation of the emittance of the electron beams from the individual emitters.        
The importance of the optimal apex diameter for the high current can be illustrated by a following numerical example: as reported by Dyke and Trolan (W. P. Dyke and J. K. Trolan, Field emission: large current densities, space charge, and the vacuum arc, Phys. Rev. 89, 799-808 (1953)), the stable field-emission current is obtained when the current density is kept at most around ˜107 A/cm2 with the corresponding emitter apex field in the order of 50-100 MV/cm. Accordingly, when the apex diameter is 1 nm, the total emission current per emitter is at most ˜300 nA. However, when the apex diameter is 100 nm, the total emission current per emitter is ˜3 mA. When the apex diameter is somewhere in between the two values and ˜0.2 mA/tip is realized, a field-emitter array device with 40,000 tips in 0.5 mm diameter (or array with 5 micrometer pitch) can emit total current below 10 A with the total thermal emittance below 0.1 mm mrad. Recent numerical calculation by M. Dehler et al. (M. Dehler, A. E. Candel, E. Gjonaj, Full scale simulation of a field-emitter arrays based electron source for free electron lasers, J. Vac. Sci. Technol. B24 (2), pp. 892-897 (2006)) has demonstrated that an electron gun using a field-emitter cathode equipped with an extraction gate and a focusing gate can indeed produce such a high quality electron beam that is applicable to construct a compact free-electron laser for sub-nanometer emission wavelength.
2. Description of the Related Art
Zimmerman (U.S. Pat. No. 5,141,459) disclosed a method to fabricate a field-emitter structure with non-sharp tip apex diameter by incompletely filling the mold holes with the sacrificial material. However, with this method, achieving uniform apex diameter is not an easy task.
Marcus et al. (U.S. Pat. No. 5,201,992) disclosed a method to manufacture a field-emitter structure made of silicon having a flat top as an intermediate step to manufacture ultra-sharp tips with apex diameter of a few nanometers. As such, the uniformity of the flat-topped emitter apex is an issue here. They disclosed a method to control the apex diameter larger than a few nanometers by first repeatedly applying oxidation to the flat-topped structure to form emitter structures having uniform but sharp apex diameters less than a few nanometers, and then applying further oxidation processing to thus formed emitter structures with sharp apex to increase the apex diameter above 2.5 nm.
B. K. Ju et al. (U.S. Pat. No. 5,827,752) disclosed a method to form mold holes with large apex diameters in a silicon substrate by first manufacturing pyramidal shaped holes by the crystal-orientation-dependent etching of a silicon (100) substrate, then oxidizing the substrate, and finally removing the silicon dioxide.
Yagi et al. (U.S. Pat. No. 6,227,519 B1) disclosed a method to control the tip-shape based on the molding method by applying a heat flowable material in the mold holes.
Österschulze et al. (DE 102 36 149 A1) disclosed a method to form mold recesses to manufacture tips with 100 nm and below by utilizing a selective etching of a thin film deposited on a pre-recessed semiconductor substrate.